#ifndef EDTREGBITS_H #define EDTREGBITS_H /***************************/ /* Bit field names extracted from edtreg.h */ /* Can be used for debugging and */ /* printed out by setdebug */ /***************************/ typedef struct _BitLabels { char *label; unsigned int bit; } BitLabels; BitLabels BL_SG_NXT_CNT_WRITE[] = { {"BURST_EN", EDT_BURST_EN}, {"DMA_MEM_RD", EDT_DMA_MEM_RD}, {"DMA_ABORT", EDT_DMA_ABORT}, {"EN_SG_DONE", EDT_EN_SG_DONE}, {"EN_MN_DONE", EDT_EN_MN_DONE}, {"DMA_START", EDT_DMA_START}, {"EN_RDY", EDT_EN_RDY}, {0,0} }; BitLabels BL_SG_NXT_CNT[] = { {"NXTPG_INT", EDT_NXTPG_INT}, {"CURPG_INT", EDT_CURPG_INT}, {"PG_INT", EDT_PG_INT}, {"READ0_0", EDT_READ0_0}, {"READ0_1", EDT_READ0_1}, {"READ0_2", EDT_READ0_2}, {"MN_NXT_EMP", EDT_MN_NXT_EMP}, {"MN_DMA_DONE", EDT_MN_DMA_DONE}, {"MN_BURST_EN", EDT_MN_BURST_EN}, {"MN_DMA_MEM_RD", EDT_MN_DMA_MEM_RD}, {"READ0_3", EDT_READ0_3}, {"DMA_RDY", EDT_DMA_RDY}, {"DMA_DONE", EDT_DMA_DONE}, {0,0} }; BitLabels BL_SG_LIST_CNTL[] = { {"LIST_PAGEINT", EDT_LIST_PAGEINT}, {0,0} }; BitLabels BL_DMA_CFG_WRITE[] = { {"RMT_ADDR", EDT_RMT_ADDR}, {"RMT_AUTO_INCR", EDT_RMT_AUTO_INCR}, {"RFIFO_ENB", EDT_RFIFO_ENB}, {"WRITE_STROBE", EDT_WRITE_STROBE}, {"RMT_EN_INTR", EDT_RMT_EN_INTR}, {"PCI_EN_INTR", EDT_PCI_EN_INTR}, {"RMT_DATA", EDT_RMT_DATA}, {"RMT_CCLK", EDT_RMT_CCLK}, {"RMT_PROG", EDT_RMT_PROG}, {"RMT_INIT", EDT_RMT_INIT}, {"RMT_DONE", EDT_RMT_DONE}, {"RMT_STATE", EDT_RMT_STATE}, {"FIFO_CNT", EDT_FIFO_CNT}, {"FIFO_FLG", EDT_FIFO_FLG}, {0,0} }; BitLabels BL_DMA_CFG[] = { {"FOI_XMT_EMP", FOI_XMT_EMP}, {"FOI_RCV_RDY", FOI_RCV_RDY}, {"DMA_INTR", EDT_DMA_INTR}, {"RMT_INTR", EDT_RMT_INTR}, {"RMT_EN_INTR", EDT_RMT_EN_INTR}, {"PCI_EN_INTR", EDT_PCI_EN_INTR}, {0,0} }; BitLabels BL_X_PROG[] = { {"X_DATA", X_DATA}, {"X_CCLK", X_CCLK}, {"X_PROG", X_PROG}, {"X_INIT", X_INIT}, {"X_DONE", X_DONE}, {"X_INITSTAT", X_INITSTAT}, {0,0} }; BitLabels BL_REGISTERS[] = { {"DMA_CUR_ADDR", EDT_DMA_CUR_ADDR}, {"DMA_NXT_ADDR", EDT_DMA_NXT_ADDR}, {"DMA_CUR_CNT", EDT_DMA_CUR_CNT}, {"DMA_NXT_CNT", EDT_DMA_NXT_CNT}, {"SG_CUR_ADDR", EDT_SG_CUR_ADDR}, {"SG_NXT_ADDR", EDT_SG_NXT_ADDR}, {"SG_CUR_CNT", EDT_SG_CUR_CNT}, {"SG_NXT_CNT", EDT_SG_NXT_CNT}, {"CHAN_OFFSET", EDT_CHAN_OFFSET}, {"GP_OUTPUT", EDT_GP_OUTPUT}, {"DMA_CFG", EDT_DMA_CFG}, {"INTR_CFG", EDT_INTR_CFG}, {"DMA_INTCFG", EDT_DMA_INTCFG}, {"DMA_INTCFG_ONLY", EDT_DMA_INTCFG_ONLY}, {"REMOTE_OFFSET", EDT_REMOTE_OFFSET}, {"DMA_INTCFG_ONLY", EDT_DMA_INTCFG_ONLY}, {"DMA_INTCFG", EDT_DMA_INTCFG}, {"REMOTE_OFFSET", EDT_REMOTE_OFFSET}, {"DMA_STATUS", EDT_DMA_STATUS}, {"REMOTE_DATA", EDT_REMOTE_DATA}, {"FLASHROM_ADDR", EDT_FLASHROM_ADDR}, {"FLASHROM_DATA", EDT_FLASHROM_DATA}, {"CHAN0", EDT_CHAN0}, {"CHAN1", EDT_CHAN1}, {"CHAN2", EDT_CHAN2}, {"CHAN3", EDT_CHAN3}, {"WRITECMD", EDT_WRITECMD}, {"CMD", PDV_CMD}, {"REV", PDV_REV}, {"STAT", PDV_STAT}, {"CFG", PDV_CFG}, {"SHUTTER", PDV_SHUTTER}, {"SHUTTER_LEFT", PDV_SHUTTER_LEFT}, {"UTIL3", PDV_UTIL3}, {"FRAME_PERIOD0", PDV_FRAME_PERIOD0}, {"FRAME_PERIOD1", PDV_FRAME_PERIOD1}, {"FRAME_PERIOD2", PDV_FRAME_PERIOD2}, {"DATA_PATH", PDV_DATA_PATH}, {"MODE_CNTL", PDV_MODE_CNTL}, {"DATA_MSB", PDV_DATA_MSB}, {"DATA_LSB", PDV_DATA_LSB}, {"FIXEDLEN", PDV_FIXEDLEN}, {"SERIAL_DATA", PDV_SERIAL_DATA}, {"SERIAL_DATA_STAT", PDV_SERIAL_DATA_STAT}, {"SERIAL_DATA_CNTL", PDV_SERIAL_DATA_CNTL}, {"SERIAL_CNTL2", PDV_SERIAL_CNTL2}, {"BYTESWAP", PDV_BYTESWAP}, {"UTILITY", PDV_UTILITY}, {"UTIL2", PDV_UTIL2}, {"SHIFT", PDV_SHIFT}, {"MASK", PDV_MASK}, {"MASK_LO", PDV_MASK_LO}, {"MASK_HI", PDV_MASK_HI}, {"ROICTL", PDV_ROICTL}, {"HSKIP", PDV_HSKIP}, {"HACTV", PDV_HACTV}, {"VSKIP", PDV_VSKIP}, {"VACTV", PDV_VACTV}, {"XOPT", PDV_XOPT}, {0,0} }; BitLabels BL_PDV_ROICTL[] = { {"ROICTL_DALSA_LS", PDV_ROICTL_DALSA_LS}, {"ROICTL_ROI_EN", PDV_ROICTL_ROI_EN}, {"ROICTL_SIM_SYNC", PDV_ROICTL_SIM_SYNC}, {"ROICTL_SIM_DAT", PDV_ROICTL_SIM_DAT}, {"ROICTL_DUAL_CHAN", PDV_ROICTL_DUAL_CHAN}, {"ROICTL_PCLKSEL_MSK", PDV_ROICTL_PCLKSEL_MSK}, {"RIOCTL_PCLKSEL_DBL_CAM", PDV_RIOCTL_PCLKSEL_DBL_CAM}, {0,0} }; BitLabels BL_PDV_CMD[] = { {"RESET_INTFC", PDV_RESET_INTFC}, {"ENABLE_GRAB", PDV_ENABLE_GRAB}, {"AQ_CLR", PDV_AQ_CLR}, {"CLR_CONT", PDV_CLR_CONT}, {0,0} }; BitLabels BL_PDV_CFG[] = { {"DIS_SHUTTER", PDV_DIS_SHUTTER}, {"TRIG", PDV_TRIG}, {"INV_SHUTTER", PDV_INV_SHUTTER}, {"FIFO_RESET", PDV_FIFO_RESET}, {"BAUD2", PDV_BAUD2}, {"RESERVED1", PDV_RESERVED1}, {"EN_DALSA", PDV_EN_DALSA}, {"INT_ENAQ", PDV_INT_ENAQ}, {0,0} }; BitLabels BL_PDV_DATA_PATH[] = { {"EXT_DEPTH", PDV_EXT_DEPTH}, {"DUAL_CHAN", PDV_DUAL_CHAN}, {"RES0", PDV_RES0}, {"RES1", PDV_RES1}, {"RES_MASK", PDV_RES_MASK}, {"INVERT", PDV_INVERT}, {"CONTINUOUS", PDV_CONTINUOUS}, {"INTERLACED", PDV_INTERLACED}, {"DECADE0", PDV_DECADE0}, {"DECADE1", PDV_DECADE1}, {0,0} }; BitLabels BL_PDV_STAT[] = { {"OVERRUN", PDV_OVERRUN}, {"FRAME_VALID", PDV_FRAME_VALID}, {"EXPOSURE", PDV_EXPOSURE}, {"FIELD", PDV_FIELD}, {"SW_ARMED", PDV_SW_ARMED}, {"CHAN_ID0", PDV_CHAN_ID0}, {"CHAN_ID1", PDV_CHAN_ID1}, {"GRAB_ARMED", PDV_GRAB_ARMED}, {"AQUIRE_IP", PDV_AQUIRE_IP}, {0,0} }; BitLabels BL_PDV_UTILITY[] = { {"BSWAP", PDV_BSWAP}, {"PAD0", PDV_PAD0}, {"PAD1", PDV_PAD1}, {"SSWAP", PDV_SSWAP}, {"DISABLEMD", PDV_DISABLEMD}, {"GENDATA", PDV_GENDATA}, {"SKIP", PDV_SKIP}, {"VIDDIR", PDV_VIDDIR}, {0,0} }; BitLabels BL_PDV_UTIL2[] = { {"PHOTO_TRIGGER", PDV_PHOTO_TRIGGER}, {"FLDID_TRIGGER", PDV_FLDID_TRIGGER}, {"AQUIRE_MULTIPLE", PDV_AQUIRE_MULTIPLE}, {"INT_ENFV", PDV_INT_ENFV}, {"DBL_TRIG", PDV_DBL_TRIG}, {"PULNIX", PDV_PULNIX}, {"MC4", PDV_MC4}, {"SEL_MC4", PDV_SEL_MC4}, {0,0} }; #define PDV_PULNIX 0x20 /* expose can be asserted during fv, */ BitLabels BL_PDVA_UTIL2[] = { {"PHOTO_TRIGGER", PDV_PHOTO_TRIGGER}, {"FLDID_TRIGGER", PDV_FLDID_TRIGGER}, {"AQUIRE_MULTIPLE", PDV_AQUIRE_MULTIPLE}, {"INT_ENFV", PDV_INT_ENFV}, {"DBL_TRIG", PDV_DBL_TRIG}, {"PULNIX", PDV_PULNIX}, {"RX232", PDV_RX232}, {"SEL_MC4", PDV_SEL_MC4}, {0,0} }; /* PDV_BYTESWAP treated like PCD_BYTESWAP */ BitLabels BL_PDV_BYTESWAP[] = { {"BYTESWAP", PCD_BYTESWAP}, {"SHORTSWAP", PCD_SHORTSWAP}, {"EN_IDVDLY", PCD_EN_IDVDLY}, {0,0} }; BitLabels BL_PDV_SHIFT[] = { {"AIA_SWAP", PDV_AIA_SWAP}, {0,0} }; BitLabels BL_PDV_MODE_CNTL[] = { {"AIA_MC0", PDV_AIA_MC0}, {"AIA_MC1", PDV_AIA_MC1}, {"AIA_MC2", PDV_AIA_MC2}, {"AIA_MC3", PDV_AIA_MC3}, {"EN_SHUTTER0", PDV_EN_SHUTTER0}, {"EN_SHUTTER1", PDV_EN_SHUTTER1}, {"EN_SHUTTER2", PDV_EN_SHUTTER2}, {"EN_SHUTTER3", PDV_EN_SHUTTER3}, {0,0} }; BitLabels BL_PDV_MCTL_AIA[] = { {"MODE_CONTROLLED", PDV_MODE_CONTROLLED}, {"MODE_TRG", PDV_MODE_TRG}, {"MODE_CONT", PDV_MODE_CONT}, {0,0} }; BitLabels BL_PDV_SERIAL_DATA_STAT[] = { {"RECEIVE_RDY", PDV_RECEIVE_RDY}, {"TRANSMIT_RDY", PDV_TRANSMIT_RDY}, {"LHS_DONE", LHS_DONE}, {"LHS_INTERRUPT", LHS_INTERRUPT}, {"FVAL_INT", PDV_FVAL_INT}, {"AQUIRE_INT", PDV_AQUIRE_INT}, {"FVAL_INTA", PDV_FVAL_INTA}, {"INTFC_INT", PDV_INTFC_INT}, {0,0} }; BitLabels BL_PDV_SERIAL_DATA_CNTL[] = { {"EN_RX", PDV_EN_RX}, {"EN_TX", PDV_EN_TX}, {"EN_RX_INT", PDV_EN_RX_INT}, {"EN_TX_INT", PDV_EN_TX_INT}, {"EN_DEV_INT", PDV_EN_DEV_INT}, {"CLR_RX_INT", PDV_CLR_RX_INT}, {"BAUD0", PDV_BAUD0}, {"BAUD1", PDV_BAUD1}, {"LHS_INTEN", LHS_INTEN}, {0,0} }; BitLabels BL_PDV_UTIL3[] = { {"PDV_PTRIGINV",PDV_PTRIGINV}, {"FV_INVERT", PDV_FV_INVERT}, {"FV_INT_INVERT", PDV_FV_INT_INVERT}, {"PDV_TRIGINT", PDV_TRIGINT}, {"PDV_MODE16", PDV_MODE16}, {"PDV_FVADJ", PDV_FVADJ}, {"PDV_FRENA", PDV_FRENA}, {0,0} }; BitLabels BL_PDV_LHS_CONTROL[] = { {"LHS_RESET", PDV_LHS_RESET}, {"LHS_ENABLE", PDV_LHS_ENABLE}, {"DAC_LOAD", PDV_LHS_DAC_LOAD}, {"DAC_DATA", PDV_LHS_DAC_DATA}, {"DAC_CLOCK", PDV_LHS_DAC_CLOCK}, {0,0} }; #ifdef READY /* For future expansion */ {"BAUD_MASK", PDV_BAUD_MASK}, {"BRKENA", PDV_BRKENA}, {"BRKSEL", PDV_BRKSEL}, {"SIM_STATUS", SIM_STATUS}, {"SIM_CFG", SIM_CFG}, {"SIM_WIDTH", SIM_WIDTH}, {"SIM_LDELAY", SIM_LDELAY}, {"SIM_HEIGHT", SIM_HEIGHT}, {"SIM_FDELAY", SIM_FDELAY}, {"SIM_SPEED", SIM_SPEED}, {"FOI_MSG", FOI_MSG}, {"FOI_WR_MSG_DATA", FOI_WR_MSG_DATA}, {"FOI_WR_MSG_STAT", FOI_WR_MSG_STAT}, {"FOI_RD_MSG_DATA", FOI_RD_MSG_DATA}, {"FOI_RD_MSG_STAT", FOI_RD_MSG_STAT}, {"FOI_TX_FIFO_EMP", FOI_TX_FIFO_EMP}, {"FOI_TX_FIFO_FULL", FOI_TX_FIFO_FULL}, {"FOI_FIFO_FLUSH", FOI_FIFO_FLUSH}, {"FOI_MSG_SEND", FOI_MSG_SEND}, {"FOI_MSG_BSY", FOI_MSG_BSY}, {"FOI_DATA_AVAIL", FOI_DATA_AVAIL}, {"FOI_FIFO_EMPTY", FOI_FIFO_EMPTY}, {"FOI_RXWM1", FOI_RXWM1}, {"FOI_WAITEOF", FOI_WAITEOF}, {"RCI_FIFO_EMPTY", RCI_FIFO_EMPTY}, {"RCI_FIFO_AEMPTY", RCI_FIFO_AEMPTY}, {"RCI_FIFO_AFULL", RCI_FIFO_AFULL}, {"RCI_FIFO_FULL", RCI_FIFO_FULL}, {"CAM_CMD", CAM_CMD}, {"CAM_STAT", CAM_STAT}, {"CAM_COMPARE", CAM_COMPARE}, {"CAM_LSPIXELS", CAM_LSPIXELS}, {"CAM_MSPIXELS", CAM_MSPIXELS}, {"CAM_HEIGHT", CAM_HEIGHT}, {"CAM_WIDTH", CAM_WIDTH}, {"CAM_FV", CAM_FV}, {"CAM_LV", CAM_LV}, {"CAM_PCLK", CAM_PCLK}, {"PCD_CMD", PCD_CMD}, {"PCD_DATA_PATH_STAT", PCD_DATA_PATH_STAT}, {"PCD_FUNCT", PCD_FUNCT}, {"PCD_STAT", PCD_STAT}, {"PCD_STAT_POLARITY", PCD_STAT_POLARITY}, {"PCD_OPTION", PCD_OPTION}, {"PCD_DIRA", PCD_DIRA}, {"PCD_DIRB", PCD_DIRB}, {"PCD_CONFIG", PCD_CONFIG}, {"PCD_CYCLE_CNT", PCD_CYCLE_CNT}, {"REF_SCALE", EDT_REF_SCALE}, {"OUT_SCALE", EDT_OUT_SCALE}, {"PCD_RTCWORD", PCD_RTCWORD}, {"PCD_RTCADDR", PCD_RTCADDR}, {"SSDIO_SHFT_RIGHT", SSDIO_SHFT_RIGHT}, {"SSDIO_STROBE", SSDIO_STROBE}, {"SSDIO_STOP_CLK", SSDIO_STOP_CLK}, {"SSDIO_ENABLE_RDQ", SSDIO_ENABLE_RDQ}, {"SSDIO_EN_EXT_CLK", SSDIO_EN_EXT_CLK}, {"SSDIO_LAST_BIT", SSDIO_LAST_BIT}, {"SSDIO_BYTE_CNT0", SSDIO_BYTE_CNT0}, {"SSDIO_BYTE_CNT1", SSDIO_BYTE_CNT1}, {"SSDIO_BYTECNT_MSK", SSDIO_BYTECNT_MSK}, {"SSDIO_BYTECNT_SHFT", SSDIO_BYTECNT_SHFT}, {"SSDIO_IDLE", SSDIO_IDLE}, {"REF_XTAL", REF_XTAL}, {"FAST_DIV", EDT_FAST_DIV}, {"FAST_DIV1", EDT_FAST_DIV1}, {"FAST_DIV3", EDT_FAST_DIV3}, {"FAST_DIV5", EDT_FAST_DIV5}, {"FAST_DIV7", EDT_FAST_DIV7}, {"X_DIVN", EDT_X_DIVN}, {"X_DIVN_SHFT", EDT_X_DIVN_SHFT}, {"PCD_DIR", PCD_DIR}, {"PCD_BNR_ENABLE", PCD_BNR_ENABLE}, {"PCD_DATA_INV", PCD_DATA_INV}, {"PCD_ENABLE", PCD_ENABLE}, {"PCD_STAT_INT_EN_1", PCD_STAT_INT_EN_1}, {"PCD_STAT_INT_EN_2", PCD_STAT_INT_EN_2}, {"PCD_STAT_INT_EN_3", PCD_STAT_INT_EN_3}, {"PCD_STAT_INT_EN_4", PCD_STAT_INT_EN_4}, {"PCD_STAT_INT_EN_X", PCD_STAT_INT_EN_X}, {"PCD_STAT_1", PCD_STAT_1}, {"PCD_STAT_2", PCD_STAT_2}, {"PCD_STAT_3", PCD_STAT_3}, {"PCD_STAT_4", PCD_STAT_4}, {"PCD_STAT_INT_1", PCD_STAT_INT_1}, {"PCD_STAT_INT_2", PCD_STAT_INT_2}, {"PCD_STAT_INT_3", PCD_STAT_INT_3}, {"PCD_STAT_INT_4", PCD_STAT_INT_4}, {"PCD_STAT_INT_X", PCD_STAT_INT_X}, {"PCD_STAT_INT_ENA", PCD_STAT_INT_ENA}, {"PCD_EN_BACK_IO", PCD_EN_BACK_IO}, {"PCD_OUT_EMP", PCD_OUT_EMP}, {"PCD_UNUSED", PCD_UNUSED}, {"PCD_UNDERFLOW", PCD_UNDERFLOW}, {"PCD_OVERFLOW", PCD_OVERFLOW}, {"PCD_IN_FULL", PCD_IN_FULL}, {"PCD_SPARE0", PCD_SPARE0}, {"PCD_IN_ALMOST_FULL", PCD_IN_ALMOST_FULL}, {"PCD_SPARE", PCD_SPARE}, {"APTIX_UNDERFLOW", APTIX_UNDERFLOW}, {"APTIX_OVERFLOW", APTIX_OVERFLOW}, {"APTIX_IDLE", APTIX_IDLE}, {"APTIX_WAIT_FOR_WRITE", APTIX_WAIT_FOR_WRITE}, {"APTIX_WAIT_FOR_READ", APTIX_WAIT_FOR_READ}, {"APTIX_READING", APTIX_READING}, {"PCD_BYTESWAP", PCD_BYTESWAP}, {"PCD_SHORTSWAP", PCD_SHORTSWAP}, {"PCD_EN_IDVDLY", PCD_EN_IDVDLY}, {"XTEST_CMD", XTEST_CMD}, {"XTEST_CMD0", XTEST_CMD0}, {"XTEST_CMD1", XTEST_CMD1}, {"XTEST_STAT", XTEST_STAT}, {"XTEST_NOTUSED", XTEST_NOTUSED}, {"XTEST_DIRREG", XTEST_DIRREG}, {"XTEST_DIRA", XTEST_DIRA}, {"XTEST_DIRB", XTEST_DIRB}, {"XTEST_COUNT1", XTEST_COUNT1}, {"XTEST_COUNT0", XTEST_COUNT0}, {"XTEST_RDDO", XTEST_RDDO}, {"XTEST_RDDO0_7", XTEST_RDDO0_7}, {"XTEST_RDDO8_15", XTEST_RDDO8_15}, {"XTEST_RDCO", XTEST_RDCO}, {"XTEST_RDCO0_7", XTEST_RDCO0_7}, {"XTEST_RDCO8_15", XTEST_RDCO8_15}, {"XTEST_RDDI", XTEST_RDDI}, {"XTEST_RDDI0_7", XTEST_RDDI0_7}, {"XTEST_RDDI8_15", XTEST_RDDI8_15}, {"XTEST_RDCI", XTEST_RDCI}, {"XTEST_RDCI0_7", XTEST_RDCI0_7}, {"XTEST_RDCI8_15", XTEST_RDCI8_15}, {"XTEST_EN_DATA_03_811", XTEST_EN_DATA_03_811}, {"XTEST_EN_DATA_47_1215", XTEST_EN_DATA_47_1215}, {"XTEST_EN_CTL_03_811", XTEST_EN_CTL_03_811}, {"XTEST_EN_CTL_47_1215", XTEST_EN_CTL_47_1215}, {"XTEST_ASSRT_DEV_INT", XTEST_ASSRT_DEV_INT}, {"XTEST_EN_BACK_IO", XTEST_EN_BACK_IO}, {"XTEST_DEV_READ", XTEST_DEV_READ}, {"XTEST_EN_DATA", XTEST_EN_DATA}, {"XTEST_UN_RESET_FIFO", XTEST_UN_RESET_FIFO}, {"XTEST_BIT32", XTEST_BIT32}, {"XTEST_SWAPWORDS", XTEST_SWAPWORDS}, {"XTEST_INVERT", XTEST_INVERT}, {"XTEST_SWAPBYTES", XTEST_SWAPBYTES}, {"XTEST_NOT_OUT_FIFO_1_EMPTY", XTEST_NOT_OUT_FIFO_1_EMPTY}, {"XTEST_NOT_OUT_FIFO_0_EMPTY", XTEST_NOT_OUT_FIFO_0_EMPTY}, {"XTEST_NOT_IN_FIFO_1_FULL", XTEST_NOT_IN_FIFO_1_FULL}, {"XTEST_NOT_IN_FIFO_0_FULL", XTEST_NOT_IN_FIFO_0_FULL}, {"XTEST_NOT_IN_FIFO_A_FULL", XTEST_NOT_IN_FIFO_A_FULL}, {"PCDTEST_ENCHK", PCDTEST_ENCHK}, {"PCDTEST_ENCMP", PCDTEST_ENCMP}, {"PCDTEST_ENUNDER", PCDTEST_ENUNDER}, {"PCDTEST_ENABLE", PCDTEST_ENABLE}, {"PCDTEST_SETDNR", PCDTEST_SETDNR}, {"PCDTEST_IGNORE_BNR", PCDTEST_IGNORE_BNR}, {"PCDTEST_EN_BACK_IO", PCDTEST_EN_BACK_IO}, {"PCDTEST_STAT_MSK", PCDTEST_STAT_MSK}, {"PCDTEST_FUNCT_MSK", PCDTEST_FUNCT_MSK}, {"FUNCT_PLLCLK", EDT_FUNCT_PLLCLK}, {"FUNCT_SELAV", EDT_FUNCT_SELAV}, {"FUNCT_DATA", EDT_FUNCT_DATA}, {"FUNCT_CLK", EDT_FUNCT_CLK}, {"PCDTEST_OFIFO_NE", PCDTEST_OFIFO_NE}, {"PCDTEST_IFIFO_EMP", PCDTEST_IFIFO_EMP}, {"PCDTEST_UNDER", PCDTEST_UNDER}, {"PCDTEST_IFIFO_NF", PCDTEST_IFIFO_NF}, {"PCDTEST_IFIFO_NAF", PCDTEST_IFIFO_NAF}, {"PCDTEST_SP_IN", PCDTEST_SP_IN}, {"PCDT_CMD", PCDT_CMD}, {"PCDT_DPSTAT", PCDT_DPSTAT}, {"PCDT_STAT", PCDT_STAT}, {"PCDT_FUNCT", PCDT_FUNCT}, {"PCDT_POLARITY", PCDT_POLARITY}, {"PCDT_DIVIDE", PCDT_DIVIDE}, {"PCDT_START", PCDT_START}, {"PCDT_BITE", PCDT_BITE}, {"PCDT_IODIR", PCDT_IODIR}, {"SSDT_FUNC", SSDT_FUNC}, {"PCD_DIRREG", PCD_DIRREG}, {"P16_COMMAND", P16_COMMAND}, {"P16_CONFIG", P16_CONFIG}, {"P16_STATUS", P16_STATUS}, {"P16_DATA", P16_DATA}, {"P16_EN_INT", P16_EN_INT}, {"P16_EN_DINT", P16_EN_DINT}, {"P16_FCLK", P16_FCLK}, {"P16_ODDSTART", P16_ODDSTART}, {"P16_BCLR", P16_BCLR}, {"P16_INIT", P16_INIT}, {"P16_FNCT3", P16_FNCT3}, {"P16_FNCT2", P16_FNCT2}, {"P16_FNCT1", P16_FNCT1}, {"P16_FLUSH", P16_FLUSH}, {"P16_SWAP", P16_SWAP}, {"P16_DFRST", P16_DFRST}, {"P16_CLKP", P16_CLKP}, {"P16_DACKP", P16_DACKP}, {"P16_INT", P16_INT}, {"P16_DEVINT", P16_DEVINT}, {"P16_DMA_INT", P16_DMA_INT}, {"P16_DINT_S", P16_DINT_S}, {"P16_STATC_S", P16_STATC_S}, {"P16_STATB_S", P16_STATB_S}, {"P16_STATA_S", P16_STATA_S}, {"P16_D_INIT_S", P16_D_INIT_S}, {"P16_FNCT3_S", P16_FNCT3_S}, {"P16_FNCT2_S", P16_FNCT2_S}, {"P16_FNCT1_S", P16_FNCT1_S}, {"P16_ENDINT_S", P16_ENDINT_S}, {"P16_DIR_S", P16_DIR_S}, {"P11_COMMAND", P11_COMMAND}, {"P11_CONFIG", P11_CONFIG}, {"P11_STATUS", P11_STATUS}, {"P11_DATA", P11_DATA}, {"P11_COUNT", P11_COUNT}, {"P11_COMMAND", P11_COMMAND}, {"P11_CONFIG", P11_CONFIG}, {"P11_STATUS", P11_STATUS}, {"P11_DATA", P11_DATA}, {"P11_COUNT", P11_COUNT}, {"command", command}, {"P11W_GO", P11W_GO}, {"P11W_BLKM", P11W_BLKM}, {"P11W_DIRS0", P11W_DIRS0}, {"P11W_DIRS1", P11W_DIRS1}, {"P11W_FNCT1", P11W_FNCT1}, {"P11W_FNCT2", P11W_FNCT2}, {"P11W_FNCT3", P11W_FNCT3}, {"P11W_INIT", P11W_INIT}, {"P11W_BCLR", P11W_BCLR}, {"P11W_ODDSTART", P11W_ODDSTART}, {"P11W_FCYC", P11W_FCYC}, {"P11W_EN_ATT", P11W_EN_ATT}, {"P11W_EN_CNT", P11W_EN_CNT}, {"P11W_EN_INT", P11W_EN_INT}, {"convienent", convienent}, {"P11W_RESET", P11W_RESET}, {"status", status}, {"P11W_RDY_S", P11W_RDY_S}, {"P11W_BLKM_S", P11W_BLKM_S}, {"P11W_FNCT1_S", P11W_FNCT1_S}, {"P11W_FNCT2_S", P11W_FNCT2_S}, {"P11W_FNCT3_S", P11W_FNCT3_S}, {"P11W_INIT_S", P11W_INIT_S}, {"P11W_STATA_S", P11W_STATA_S}, {"P11W_STATB_S", P11W_STATB_S}, {"P11W_STATC_S", P11W_STATC_S}, {"P11W_ATTN", P11W_ATTN}, {"P11W_DMAINT", P11W_DMAINT}, {"P11W_ATTNINT", P11W_ATTNINT}, {"P11W_CNTINT", P11W_CNTINT}, {"P11W_REOD", P11W_REOD}, {"P11W_INT", P11W_INT}, {"configuration", configuration}, {"P11W_BSYP", P11W_BSYP}, {"P11W_CYCP", P11W_CYCP}, {"P11W_ENBB", P11W_ENBB}, {"P11W_OUTSK0", P11W_OUTSK0}, {"P11W_OUTSK1", P11W_OUTSK1}, {"P11W_INSK0", P11W_INSK0}, {"P11W_INSK1", P11W_INSK1}, {"P11W_RDYT", P11W_RDYT}, {"P11W_SWAP", P11W_SWAP}, {"P11W_INV", P11W_INV}, {"P11W_NCOA", P11W_NCOA}, {"P11W_PFCT2", P11W_PFCT2}, {"LOCAL_XILINX_TYPE", LOCAL_XILINX_TYPE}, {"REMOTE_XILINX_TYPE", REMOTE_XILINX_TYPE}, {"MAC8100_TYPE", MAC8100_TYPE}, {"LOCAL_DMA_TYPE", LOCAL_DMA_TYPE}, {"REG_FILE_TYPE", REG_FILE_TYPE}, {"INTFC_BYTE", INTFC_BYTE}, {"INTFC_WORD", INTFC_WORD}, {"INTFC_32", INTFC_32}, {"MAC8100_WORD", MAC8100_WORD}, #endif #endif