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SUMT_private.h File Reference

Summit chip and board hardware definitions. More...

#include "vxWorks.h"
#include "MSG/MSG_pubdefs.h"

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Data Structures

struct  _SUMT_Cmd_Blk
struct  _SUMT_Desc
struct  _SUMT_Log
struct  _SUMT_Regs

REGISTER #0: SUMMIT Control Register Definitions

#define SUMT_XMTSW   0x0001
#define SUMT_INTEN   0x0002
#define SUMT_PPEN   0x0004
#define SUMT_DYNBC   0x0008
#define SUMT_BCEN   0x0010
#define SUMT_BUFR   0x0040
#define SUMT_ETCE   0x0400
#define SUMT_CHBEN   0x0800
#define SUMT_CHAEN   0x1000
#define SUMT_SRST   0x2000
#define SUMT_SBIT   0x4000
#define SUMT_STEX   0x8000

REGISTER #1: SUMMIT RT Status Register Definitions

#define SUMT_TERACT   0x0001
#define SUMT_READY   0x0002
#define SUMT_TPARF   0x0004
#define SUMT_EX   0x0008
#define SUMT_SSYSF   0x0010
#define SUMT_AUTOEN   0x0020
#define SUMT_LOCK   0x0040
#define SUMT_ABSTD   0x0080
#define SUMT_MSEL   0x0300
#define SUMT_RTPTY   0x0400
#define SUMT_RTA   0xf800
#define SUMT_MSEL_BC   0x0000
#define SUMT_MSEL_RT   0x0100
#define SUMT_MSEL_MT   0x0200

REGISTERS #s 3 AND 4: Interrupt Mask/Pending Definitions

#define SUMT_CBA   0x0002
#define SUMT_RTF   0x0004
#define SUMT_ILLOP   0x0008
#define SUMT_ILLCMD   0x0010
#define SUMT_EOL   0x0020
#define SUMT_ILCMD   0x0080
#define SUMT_IXEQ0   0x0100
#define SUMT_BDRCV   0x0200
#define SUMT_SUBAD   0x0400
#define SUMT_MERR   0x0800
#define SUMT_BITF   0x1000
#define SUMT_TAPF   0x2000
#define SUMT_WRAPF   0x4000
#define SUMT_DMAF   0x8000

REGISTER #6: BIT Word Definitions

#define SUMT_BIT_CHBF   0x0400
#define SUMT_BIT_CHAF   0x0800
#define SUMT_BIT_BITF   0x1000
#define SUMT_BIT_TAPF   0x2000
#define SUMT_BIT_WRAPF   0x4000
#define SUMT_BIT_DMAF   0x8000

REGISTER #9: Bus Status Word Register Definitions

#define SUMT_SWB_TF   0x0001
#define SUMT_SWB_SSYSF   0x0004
#define SUMT_SWB_BUSY   0x0008
#define SUMT_SWB_SRQ   0x0100
#define SUMT_SWB_INS   0x0200
#define SUMT_SWB_IMCLR   0x8000

Remote Terminal Message Information Word Definitions

#define SUMT_MIW_MAN   0x0001
#define SUMT_MIW_PRTY   0x0002
#define SUMT_MIW_OVR   0x0004
#define SUMT_MIW_TO   0x0008
#define SUMT_MIW_ILL   0x0010
#define SUMT_MIW_ME   0x0080
#define SUMT_MIW_RTRT   0x0100
#define SUMT_MIW_CHAB   0x0200
#define SUMT_MIW_WCMASK   0xf800

Remote Terminal Descriptor Definitions

#define SUMT_RT_CTRL_NII   0x0001
#define SUMT_RT_CTRL_BRD   0x0002
#define SUMT_RT_CTRL_AB   0x0004
#define SUMT_RT_CTRL_BAC   0x0010
#define SUMT_RT_CTRL_IBRD   0x0020
#define SUMT_RT_CTRL_IWA   0x0040
#define SUMT_RT_CTRL_INTX   0x0080
#define SUMT_RT_CTRL_INDEX   0xff00

Interrupt Information Word Defintions

#define SUMT_IIW_MBC   0x0001
#define SUMT_IIW_CBA   0x0002
#define SUMT_IIW_RTF   0x0004
#define SUMT_IIW_ILLOP   0x0008
#define SUMT_IIW_ILLCMD   0x0010
#define SUMT_IIW_EOL   0x0020
#define SUMT_IIW_ILCMD   0x0080
#define SUMT_IIW_IXEQ0   0x0100
#define SUMT_IIW_BDRCV   0x0200
#define SUMT_IIW_SUBAD   0x0400
#define SUMT_IIW_MERR   0x0800

Summit BC Control Word Values

#define SUMT_BC_OPCODE   0xf000
#define SUMT_BC_EOL   0x0000
#define SUMT_BC_SKIP   0x1000
#define SUMT_BC_EXE   0x4000
#define SUMT_BC_RTRY_1   0x0400
#define SUMT_BC_RTRY_2   0x0800
#define SUMT_BC_RTRY_3   0x0c00
#define SUMT_BC_RTRY_4   0x0000
#define SUMT_BC_CHA   0x0200

Summit Register Offsets

#define SUMT_REG_CONTROL   0x0000
#define SUMT_REG_STATUS   0x0002
#define SUMT_REG_COMMAND   0x0004
#define SUMT_REG_IRQ_MASK   0x0006
#define SUMT_REG_IRQ_PEND   0x0008
#define SUMT_REG_IRQ_LLP   0x000a
#define SUMT_REG_BIT_WORD   0x000c
#define SUMT_REG_TIME_TAG   0x000e
#define SUMT_REG_SRT_DP   0x0010
#define SUMT_REG_STATUS_WORD   0x0012
#define SUMT_REG_I_RCV_0   0x0020
#define SUMT_REG_I_RCV_1   0x0022
#define SUMT_REG_I_XMT_0   0x0024
#define SUMT_REG_I_XMT_1   0x0026
#define SUMT_REG_IBRD_RCV_0   0x0028
#define SUMT_REG_IBRD_RCV_1   0x002a
#define SUMT_REG_IBRD_XMT_0   0x002c
#define SUMT_REG_IBRD_XMT_1   0x002e
#define SUMT_REG_IMOD_RCV_0   0x0030
#define SUMT_REG_IMOD_RCV_1   0x0032
#define SUMT_REG_IMOD_XMT_0   0x0034
#define SUMT_REG_IMOD_XMT_1   0x0036
#define SUMT_REG_IMOD_BRD_RCV_0   0x0038
#define SUMT_REG_IMOD_BRD_RCV_1   0x003a
#define SUMT_REG_IMOD_BRD_XMT_0   0x003c
#define SUMT_REG_IMOD_BRD_XMT_1   0x003e

Summit Register Write Bit Masks

#define SUMT_WMASK_CONTROL   0x9fff
#define SUMT_WMASK_STATUS   0xff80
#define SUMT_WMASK_IRQ_MASK   0xffff
#define SUMT_WMASK_IRQ_LLP   0xffff
#define SUMT_WMASK_SRT_DP   0xffff
#define SUMT_WMASK_ILL   0xffff

Summit RT Descriptor Offsets

#define SUMT_DESC_SIZE   8
#define SUMT_DESC_CONTROL   0x0000
#define SUMT_DESC_DATA_A_PTR   0x0002
#define SUMT_DESC_DATA_B_PTR   0x0004
#define SUMT_DESC_BRDCAST_PTR   0x0006

Summit BC Command Block Offsets

#define SUMT_CMD_SIZE   16
#define SUMT_CMD_CONTROL   0x0000
#define SUMT_CMD_COMMAND_1   0x0002
#define SUMT_CMD_COMMAND_2   0x0004
#define SUMT_CMD_DATA_PTR   0x0006
#define SUMT_CMD_STATUS_1   0x0008
#define SUMT_CMD_STATUS_2   0x000a
#define SUMT_CMD_BRANCH_ADDR   0x000c
#define SUMT_CMD_TIME_DELAY   0x000e

Summit Hardware Timing Values

#define SUMT_DELAY_RESET_HW   10000
#define SUMT_DELAY_RESET_SW   12000
#define SUMT_DELAY_BIT   2000000
#define SUMT_REG_RETRY   4

Device Access Macros

#define SUMT_WORD_READ(_base, _offset)   SUMT_wordRead((_base), (_offset))
#define SUMT_WORD_WRITE(_base, _offset, _data)   SUMT_wordWrite((_base), (_offset), (_data))
#define SUMT_REG_WRITE(_base, _offset, _data, _mask)   SUMT_regWrite((_base), (_offset), (_data), (_mask))

Defines

#define SUMT_MSG(_status, _param)   _msg_report((_status), 0, 1, (_param))

Typedefs

typedef _SUMT_Regs SUMT_Regs
typedef _SUMT_Desc SUMT_Desc
typedef _SUMT_Cmd_Blk SUMT_Cmd_Blk
typedef _SUMT_Log SUMT_Log

Functions

unsigned short SUMT_addrLocalToChip (unsigned int baseAddr, unsigned int localAddr)
 Translate a CPU address into a Summit address.

unsigned int SUMT_addrChipToLocal (unsigned int baseAddr, unsigned short chipAddr)
 Translate a Summit address into a CPU address.

void SUMT_memSet (unsigned int dest, unsigned short value, unsigned int numWords)
 Set Summit shared memory to known value.

void SUMT_memCopyIn (void *dest, unsigned int src, unsigned int numWords)
 Copy data from Summit shared memory.

void SUMT_memCopyOut (unsigned int dest, void *src, unsigned int numWords)
 Copy data into Summit shared memory.

unsigned short SUMT_wordRead (unsigned int addr, unsigned int offset)
 Synchronized read of Summit register or shared memory location.

void SUMT_wordWrite (unsigned int addr, unsigned int offset, unsigned short data)
 Synchronized write to Summit register or shared memory location.

void SUMT_rtLegalize (unsigned short *regPair, unsigned short subAddr)
 Create a Summit legalization mask.

unsigned int SUMT_reset (unsigned int regs)
 Soft reset Summit controller hardware.

unsigned int SUMT_test (unsigned int regs)
 Perform Summit controller hardware built in test.

unsigned int SUMT_regWrite (unsigned int addr, unsigned int offset, unsigned short data, unsigned short mask)
 Write to a Summit controller register.


Detailed Description

Summit chip and board hardware definitions.

Author:
D.L. Wood

Define Documentation

#define SUMT_ABSTD   0x0080
 

Indicates whether the device is using 1553 standard A (1) or standard B (1).

#define SUMT_AUTOEN   0x0020
 

Indicates the value of the device AUTOEN signal.

#define SUMT_BC_CHA   0x0200
 

Send command on bus channel A.

#define SUMT_BC_EOL   0x0000
 

End of command list; stop execution.

#define SUMT_BC_EXE   0x4000
 

Execute command and continue.

#define SUMT_BC_OPCODE   0xf000
 

Bit mask for accessing opcode value in control word.

#define SUMT_BC_RTRY_1   0x0400
 

Retry command 1 time.

#define SUMT_BC_RTRY_2   0x0800
 

Retry command 2 times.

#define SUMT_BC_RTRY_3   0x0c00
 

Retry command 3 times.

#define SUMT_BC_RTRY_4   0x0000
 

Retry command 4 times.

#define SUMT_BC_SKIP   0x1000
 

Skip command and implement time delay.

#define SUMT_BCEN   0x0010
 

Enables reception of broadcast messages on RT address '31'.

#define SUMT_BDRCV   0x0200
 

Broadcast command received interrupt (RT only).

#define SUMT_BIT_BITF   0x1000
 

General built-in self test failure.

#define SUMT_BIT_CHAF   0x0800
 

BIT channel A failure.

#define SUMT_BIT_CHBF   0x0400
 

BIT channel B failure.

#define SUMT_BIT_DMAF   0x8000
 

Device DMA failure.

#define SUMT_BIT_TAPF   0x2000
 

Terminal address parity failure.

#define SUMT_BIT_WRAPF   0x4000
 

Wrap failure.

#define SUMT_BITF   0x1000
 

Built-in self test failure interrupt.

#define SUMT_BUFR   0x0040
 

Enables device internal message data buffer.

#define SUMT_CBA   0x0002
 

Command block accessed interrupt (BC only).

#define SUMT_CHAEN   0x1000
 

Enable bus channel A.

#define SUMT_CHBEN   0x0800
 

Enable bus channel B.

#define SUMT_CMD_BRANCH_ADDR   0x000c
 

The offset in bytes to the Summit BC command block branch address pointer.

#define SUMT_CMD_COMMAND_1   0x0002
 

The offset in bytes to the Summit BC command block 1553 command 1 word.

#define SUMT_CMD_COMMAND_2   0x0004
 

The offset in bytes to the Summit BC command block 1553 command 2 word.

#define SUMT_CMD_CONTROL   0x0000
 

The offset in bytes to the Summit BC command block control word.

#define SUMT_CMD_DATA_PTR   0x0006
 

The offset in bytes to the Summit BC command block data pointer.

#define SUMT_CMD_SIZE   16
 

The size in bytes of one Summit BC command block.

#define SUMT_CMD_STATUS_1   0x0008
 

The offset in bytes to the Summit BC command block 1553 status 1 word.

#define SUMT_CMD_STATUS_2   0x000a
 

The offset in bytes to the Summit BC command block 1553 status 2 word.

#define SUMT_CMD_TIME_DELAY   0x000e
 

The offset in bytes to the Summit BC command block time delay word.

#define SUMT_DELAY_BIT   2000000
 

The number of nanoseconds the Summit built in self test takes to complete. 2 msec.

#define SUMT_DELAY_RESET_HW   10000
 

The number of nanoseconds the Summit hardware reset line should be asserted. 1 usec.

#define SUMT_DELAY_RESET_SW   12000
 

The number of nanoseconds the Summit software reset takes to complete. 12 usec.

#define SUMT_DESC_BRDCAST_PTR   0x0006
 

The offset in bytes to the Summit RT descriptor broadcast data pointer.

#define SUMT_DESC_CONTROL   0x0000
 

The offset in bytes to the Summit RT descriptor control word.

#define SUMT_DESC_DATA_A_PTR   0x0002
 

The offset in bytes to the Summit RT descriptor data pointer A.

#define SUMT_DESC_DATA_B_PTR   0x0004
 

The offset in bytes to the Summit RT descriptor data pointer B.

#define SUMT_DESC_SIZE   8
 

The size in bytes of one Summit RT descriptor entry.

#define SUMT_DMAF   0x8000
 

Device DMA failure interrupt.

#define SUMT_DYNBC   0x0008
 

Allows node to accept dynamic bus control mode command.

#define SUMT_EOL   0x0020
 

End of command list interrupt (BC only).

#define SUMT_ETCE   0x0400
 

Enable external timer clock.

#define SUMT_EX   0x0008
 

The device is executing normally.

#define SUMT_IIW_BDRCV   0x0200
 

RT only - Broadcast command received.

#define SUMT_IIW_CBA   0x0002
 

BC only - Command block accessed.

#define SUMT_IIW_EOL   0x0020
 

BC only - End of command list.

#define SUMT_IIW_ILCMD   0x0080
 

RT only - Illegal bus command word received.

#define SUMT_IIW_ILLCMD   0x0010
 

BC only - Illegal bus command word in command block.

#define SUMT_IIW_ILLOP   0x0008
 

BC only - Illegal control opcode in command block.

#define SUMT_IIW_IXEQ0   0x0100
 

RT only - Index is 0 for a subaddress descriptor.

#define SUMT_IIW_MBC   0x0001
 

MT only - Monitor block count is 0.

#define SUMT_IIW_MERR   0x0800
 

Bus message error detected.

#define SUMT_IIW_RTF   0x0004
 

BC only - Command retry failure.

#define SUMT_IIW_SUBAD   0x0400
 

RT only - Subaddress accessed.

#define SUMT_ILCMD   0x0080
 

Illegal bus command received interrupt (RT only).

#define SUMT_ILLCMD   0x0010
 

Illegal bus command attempted interrupt (BC only).

#define SUMT_ILLOP   0x0008
 

Command block illegal opcode interrupt (BC only).

#define SUMT_INTEN   0x0002
 

Enables the interrupt log in shared memory.

#define SUMT_IXEQ0   0x0100
 

Index equal to 0 interrupt (RT only).

#define SUMT_LOCK   0x0040
 

Indicates the value of the device LOCK signal.

#define SUMT_MERR   0x0800
 

Bus message error interrupt.

#define SUMT_MIW_CHAB   0x0200
 

Channel A or B.

#define SUMT_MIW_ILL   0x0010
 

Illegal Command Received.

#define SUMT_MIW_MAN   0x0001
 

Manchester Error.

#define SUMT_MIW_ME   0x0080
 

Message Error.

#define SUMT_MIW_OVR   0x0004
 

Overrun Error.

#define SUMT_MIW_PRTY   0x0002
 

Parity Error.

#define SUMT_MIW_RTRT   0x0100
 

Remote Terminal to RT Xfer.

#define SUMT_MIW_TO   0x0008
 

Time-Out Error.

#define SUMT_MIW_WCMASK   0xf800
 

Bits 15 - 11 Word Count Mask.

#define SUMT_MSEL   0x0300
 

Bit mask for the mode select.

#define SUMT_MSEL_BC   0x0000
 

The mode select bits indicating bus controller function.

#define SUMT_MSEL_MT   0x0200
 

The mode select bits indicating bus monitor function.

#define SUMT_MSEL_RT   0x0100
 

The mode select bits indicating remote terminal function.

#define SUMT_MSG _status,
_param   )     _msg_report((_status), 0, 1, (_param))
 

Configuration-dependent message signaller. For boot configuration, a no-op. For application configuration, calls _msg_report().

Parameters:
_status The variable holding the status code.
_param A single parameter value for _msg_report().

#define SUMT_PPEN   0x0004
 

Enables ping-pong of data buffers in shared memory.

#define SUMT_READY   0x0002
 

The device is ready for operation.

#define SUMT_REG_BIT_WORD   0x000c
 

Register 0C Offset: Summit BIT word register

#define SUMT_REG_COMMAND   0x0004
 

Register 04 Offset: Summit current command register

#define SUMT_REG_CONTROL   0x0000
 

Register 00 Offset: Summit control register

#define SUMT_REG_I_RCV_0   0x0020
 

Register 20 Offset: Illegal Receive 0

#define SUMT_REG_I_RCV_1   0x0022
 

Register 22 Offset: Illegal Receive 1

#define SUMT_REG_I_XMT_0   0x0024
 

Register 24 Offset: Illegal Transmit 0

#define SUMT_REG_I_XMT_1   0x0026
 

Register 26 Offset: Illegal Transmit 1

#define SUMT_REG_IBRD_RCV_0   0x0028
 

Register 28 Offset: Illegal Broadcast Receive 0

#define SUMT_REG_IBRD_RCV_1   0x002a
 

Register 2A Offset: Illegal Broadcast Receive 1

#define SUMT_REG_IBRD_XMT_0   0x002c
 

Register 2C Offset: Illegal Broadcast Transmit 0

#define SUMT_REG_IBRD_XMT_1   0x002e
 

Register 2E Offset: Illegal Broadcast Transmit 1

#define SUMT_REG_IMOD_BRD_RCV_0   0x0038
 

Register 38 Offset: Illegal Mode Code Broadcast RCV 0

#define SUMT_REG_IMOD_BRD_RCV_1   0x003a
 

Register 3A Offset: Illegal Mode Code Broadcast RCV 1

#define SUMT_REG_IMOD_BRD_XMT_0   0x003c
 

Register 3C Offset: Illegal Mode Code Broadcase XMT 0

#define SUMT_REG_IMOD_BRD_XMT_1   0x003e
 

Register 3E Offset: Illegal Mode Code Broadcase XMT 1

#define SUMT_REG_IMOD_RCV_0   0x0030
 

Register 30 Offset: Illegal Mode Code Receive 0

#define SUMT_REG_IMOD_RCV_1   0x0032
 

Register 32 Offset: Illegal Mode Code Receive 1

#define SUMT_REG_IMOD_XMT_0   0x0034
 

Register 34 Offset: Illegal Mode Code Transmit 0

#define SUMT_REG_IMOD_XMT_1   0x0036
 

Register 36 Offset: Illegal Mode Code Transmit 1

#define SUMT_REG_IRQ_LLP   0x000a
 

Register 0A Offset: Summit interrupt log list pointer

#define SUMT_REG_IRQ_MASK   0x0006
 

Register 06 Offset: Summit interrupt mask register

#define SUMT_REG_IRQ_PEND   0x0008
 

Register 08 Offset: Summit interrupt pending register

#define SUMT_REG_RETRY   4
 

The number of times to retry writes to a Summit register if error are seen.

#define SUMT_REG_SRT_DP   0x0010
 

Register 10 Offset: RT descriptor / BC command block pointer register

#define SUMT_REG_STATUS   0x0002
 

Register 02 Offset: Summit status register

#define SUMT_REG_STATUS_WORD   0x0012
 

Register 12 Offset: Summit 1553 status word register

#define SUMT_REG_TIME_TAG   0x000e
 

Register 0E Offset: Summit time tag register

#define SUMT_REG_WRITE _base,
_offset,
_data,
_mask   )     SUMT_regWrite((_base), (_offset), (_data), (_mask))
 

Write one 16-bit value to the Summit internal registers.

Parameters:
_base The device register base address.
_offset The offset of the register to write.
_data The value to write.
_mask The bitmask of writable bits for the register.

#define SUMT_RT_CTRL_AB   0x0004
 

Ping-pong buffer indicator: 0 = buffer B, 1 = buffer A.

#define SUMT_RT_CTRL_BAC   0x0010
 

Block accessed status bit.

#define SUMT_RT_CTRL_BRD   0x0002
 

Broadcast message received.

#define SUMT_RT_CTRL_IBRD   0x0020
 

Interrupt when broadcast message received.

#define SUMT_RT_CTRL_INDEX   0xff00
 

Bit mask for message index value.

#define SUMT_RT_CTRL_INTX   0x0080
 

Interrupt when index is 0.

#define SUMT_RT_CTRL_IWA   0x0040
 

Interrupt when subaddress accessed.

#define SUMT_RT_CTRL_NII   0x0001
 

Enables Notice II operation concerning separation of broadcast data.

#define SUMT_RTA   0xf800
 

Bit mask for the RT address value.

#define SUMT_RTF   0x0004
 

Command block retry fail interrupt (BC only).

#define SUMT_RTPTY   0x0400
 

The RT addres parity bit value.

#define SUMT_SBIT   0x4000
 

Start device built-in self test.

#define SUMT_SRST   0x2000
 

Start device software reset.

#define SUMT_SSYSF   0x0010
 

Indicates a critical device hardware error.

#define SUMT_STEX   0x8000
 

Start normal bus processing.

#define SUMT_SUBAD   0x0400
 

Subaddress accessed interrupt (RT only).

#define SUMT_SWB_BUSY   0x0008
 

Remote terminal busy flag.

#define SUMT_SWB_IMCLR   0x8000
 

Remote terminal status immediate clear.

#define SUMT_SWB_INS   0x0200
 

Remote terminal instrumentation flag.

#define SUMT_SWB_SRQ   0x0100
 

Remote terminal service request flag.

#define SUMT_SWB_SSYSF   0x0004
 

Remote termnial subsystem failure flag.

#define SUMT_SWB_TF   0x0001
 

Remote terminal terminal flag.

#define SUMT_TAPF   0x2000
 

Terminal address parity error interrupt (RT only).

#define SUMT_TERACT   0x0001
 

The device is busy processing a bus message.

#define SUMT_TPARF   0x0004
 

Indicates a parity error for the RT address value.

#define SUMT_WMASK_CONTROL   0x9fff
 

Summit control register writable bit mask.

#define SUMT_WMASK_ILL   0xffff
 

Illegal XXX register writable bit mask.

#define SUMT_WMASK_IRQ_LLP   0xffff
 

Summit interrupt log list pointer writable bit mask

#define SUMT_WMASK_IRQ_MASK   0xffff
 

Summit interrupt mask register writable bit mask.

#define SUMT_WMASK_SRT_DP   0xffff
 

RT descriptor / BC command block pointer register writable bit mask.

#define SUMT_WMASK_STATUS   0xff80
 

Summit status register writable bit mask.

#define SUMT_WORD_READ _base,
_offset   )     SUMT_wordRead((_base), (_offset))
 

Read one 16-bit value from the Summit internal registers or shared memory.

Parameters:
_base The device register base address.
_offset The offset of the register to read.
Returns:
The 16-bit register value.

#define SUMT_WORD_WRITE _base,
_offset,
_data   )     SUMT_wordWrite((_base), (_offset), (_data))
 

Write one 16-bit value to the Summit internal registers or shared memory.

Parameters:
_base The device register base address.
_offset The offset of the register to write.
_data The value to write.

#define SUMT_WRAPF   0x4000
 

Wrap fail interrupt.

#define SUMT_XMTSW   0x0001
 

Allows automatic response to transmit last status word mode command.


Typedef Documentation

SUMT_Cmd_Blk
 

The typedef for structure _SUMT_Cmd_Blk.

SUMT_Desc
 

The typedef for _SUMT_Desc.

SUMT_Log
 

The typedef for _SUMT_Log.

SUMT_Regs
 

The typedef for _SUMT_Regs.


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