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#include <LCBD/LCBD_drv.h>
#include <LCBD/LCBC.h>
#include <LCBD/LCBD_cr.h>
#include <LCBD/LCB_cr.h>
#include <LCBD/LCBD_pci.h>
#include <PBS/TMR.h>
#include <PBS/SPIN.h>
#include <PBS/BSWP.ih>
#include <stdio.h>
#include <string.h>
Classes | |
struct | _Transaction |
Captures the features of an LCB transaction needed to submit and check for the completion status. More... | |
struct | _BugCtl |
Captures the values of the one time initialization. More... | |
struct | _MarkN_Cl |
Command list for three mark time transactions. More... | |
struct | _MarkN_Rl |
Result list for three mark time transactions. More... | |
Defines | |
#define | ALIGN_REQUEST_LIST __attribute__ ((aligned (0x1000))); |
#define | ALIGN_RESULT_LIST __attribute__ ((aligned (0x1000))); |
#define | NT 28 |
Typedefs | |
typedef struct _Transaction | Transaction |
Typedef for struct Transaction. | |
typedef struct _BugCtl | BugCtl |
Typedef for struct _BugCtl. | |
typedef struct _MarkN_Cl | MarkN_Cl |
Typedef for struct _MarkN_Cl. | |
typedef struct _MarkN_Rl | MarkN_Rl |
Typedef for struct _MarkN_Rl. | |
Functions | |
static void | build_markN (Transaction *xcr, int stall, int n, MarkN_Cl *cl, MarkN_Rl *rl_0, MarkN_Rl *rl_1, MarkN_Rl *rlCopy, unsigned int toPci) |
Constructs the command list and initializes both a copy of the result list and the transaction block. | |
static __inline void | submit (volatile unsigned int *request_queue, unsigned int request) |
Submits the specified request list to the LCB for execution. | |
static __inline unsigned int | poll (volatile unsigned int *result_queue, unsigned int ptus, int iterations) |
Polls the RESULT FIFO every nsecs for @ iterations. | |
static __inline void | invalidate_instruction_cache (void) |
Invalidate the instruction cache using the flash invalidate bit in the HID1 register. | |
static __inline void | nop (void) |
static __inline void | dcbf (void *address) |
static __inline void | dcbi (void *address) |
static __inline void | dcbt (void *address) |
static __inline void | watchdogSet (int ticks) |
static __inline unsigned int | watchdogGet (void) |
void | poll_counts (void) |
static __inline unsigned int | poll_and_tickle (volatile unsigned int *result_queue, unsigned int *probe, int iterations) |
Polls the RESULT FIFO every nsecs for @ iterations. | |
static unsigned int | check (unsigned int rd, const unsigned int *errPtr, unsigned int rla, unsigned int rlb) |
int | main (int argc, char **argv) |
Dummy main program, this does not do anything except compile on host machines. | |
unsigned int | test_bug_init (int stall) |
Initializes the test control block by loading the driver and preparing the transaction. | |
int | test_xcr_init (int stall) |
Shell callable routine to builds a transaction containing 3 mark time transactions. | |
unsigned int | test_baseline (int iterations, int ptus) |
Baseline test. | |
unsigned int | test_erratum15 (int iterations, int ncache, int which) |
Tests for reaction of deliberatingly trying to tickle Erratum ` 15. | |
unsigned int | test_bug0 (int iterations, int ptus) |
Test for bridge chip hang. This tests invalidates the instruction cache and places 0 NOPs between the poke of the PCI result address into the request list and its submission. | |
unsigned int | test_bug1 (int iterations, int ptus) |
Test for bridge chip hang. This tests flushes the instruction cache and places 1 NOP between the poke of the PCI result address into the request list and its submission. | |
unsigned int | test_bug4 (int iterations, int ptus) |
Test for bridge chip hang. This tests flushes the instruction cache and places 1 NOP between the poke of the PCI result address into the request list and its submission. | |
unsigned int | test_bug8 (int iterations, int ptus) |
Test for bridge chip hang. This tests flushes the instruction cache and places 1 NOP between the poke of the PCI result address into the request list and its submission. | |
unsigned int | test_bug12 (int iterations, int ptus) |
unsigned int | test_bug_all (int loop, int iterations, int ptus) |
Runs each test iterations times in a loop for loop times. | |
Variables | |
int | PollCnt = 0 |
static MarkN_Cl | MarkNCl |
Properly aligned command list for three mark time requests. | |
static MarkN_Rl | MarkNRl_0 |
Properly aligned result list for three mark time result items. | |
static MarkN_Rl | MarkNRl_1 |
Properly aligned result list for three mark time result items. | |
static MarkN_Rl | MarkNRlInit |
Used as a template to initialize the mark time result item This is somewhat unnecessary, but serves to prove that the result item has been written (at least once) by the LCB hardware. | |
unsigned int | WatchdogTicks = 0 |
static void build_markN | ( | Transaction * | xcr, | |
int | stall, | |||
int | n, | |||
MarkN_Cl * | cl, | |||
MarkN_Rl * | rl_0, | |||
MarkN_Rl * | rl_1, | |||
MarkN_Rl * | rlInit, | |||
unsigned int | toPci | |||
) | [static] |
Constructs the command list and initializes both a copy of the result list and the transaction block.
xcr | The command/response transaction block | |
stall | The stall time in LCB clock ticks | |
n | The number of mark times to execute | |
cl | The command list (properly aligned) | |
rl_0 | The result list (properly aligned) | |
rl_1 | The result list (properly aligned) | |
rlInit | A copy of the pre-initialized result list. This will be copied into the result list before a transaction, so that there will be a known pattern in the result list. | |
toPci | Translate to PCI address |
References _Transaction::cl, _Transaction::clSize, _Transaction::err, _LCB_ri_simple::err, _Transaction::expDsc, _LCB_ri_simple::hdr, _LCB_ci_simple::header, LCB_CI_HDR_MARK_TIME, _MarkN_Rl::mark, _MarkN_Cl::mark, _Transaction::rl, _Transaction::rlInit, _Transaction::rlPci, _Transaction::rlSize, _LCB_ci_simple::stall, _LCB_ri_err::ui, and _LCB_ri_hdr::ui.
Referenced by test_bug_init(), and test_xcr_init().
int main | ( | int | argc, | |
char ** | argv | |||
) |
Dummy main program, this does not do anything except compile on host machines.
argc | The argument count | |
argv | The argument strings |
static __inline unsigned int poll | ( | volatile unsigned int * | result_queue, | |
unsigned int | ptus, | |||
int | iterations | |||
) | [static] |
Polls the RESULT FIFO every nsecs for @ iterations.
result_queue | Address of the result queue | |
ptus | The polling rate | |
iterations | The number of polling iterations |
References _LCB_rst_dsc::bf, LCB_RST_ERR_XFR_OUT_Q_EMPTY, _LCB_rst_dsc::ui, and _LCB_rst_dsc_bf::xstatus.
Referenced by test_baseline(), test_bug0(), test_bug1(), test_bug4(), and test_bug8().
static __inline unsigned int poll_and_tickle | ( | volatile unsigned int * | result_queue, | |
unsigned int * | probe, | |||
int | iterations | |||
) | [static] |
Polls the RESULT FIFO every nsecs for @ iterations.
result_queue | Address of the result queue | |
probe | Address of the cache line to tickle | |
iterations | The number of polling iterations |
References _LCB_rst_dsc::bf, LCB_RST_ERR_XFR_OUT_Q_EMPTY, _LCB_rst_dsc::ui, and _LCB_rst_dsc_bf::xstatus.
Referenced by test_erratum15().
static __inline void submit | ( | volatile unsigned int * | request_queue, | |
unsigned int | request | |||
) | [static] |
Submits the specified request list to the LCB for execution.
request_queue | The request queue address | |
request | A pointer to a properly built (address | length) request. The transformation for local to PCI space is done in this routine. |
Referenced by test_baseline(), test_bug0(), test_bug1(), test_bug4(), test_bug8(), and test_erratum15().
unsigned int test_baseline | ( | int | iterations, | |
int | ptus | |||
) |
Baseline test.
iterations | The number of iterations to run | |
ptus | The poll rate in ptus. This effectively sets the submission rate. |
It assumes that test_bug_init has been called.
References _Transaction::cl, _Transaction::err, _Transaction::expDsc, _LCB_cl::hdr, poll(), _BugCtl::ptus, _BugCtl::reg, _LCB_prb::request_queue, _LCB_cl_hdr::result, _LCB_prb::result_queue, _Transaction::rlPci, submit(), and _BugCtl::xcr.
Referenced by test_bug_all().
unsigned int test_bug0 | ( | int | iterations, | |
int | ptus | |||
) |
Test for bridge chip hang. This tests invalidates the instruction cache and places 0 NOPs between the poke of the PCI result address into the request list and its submission.
iterations | The number of iterations to run | |
ptus | The poll rate in ptus. This effectively sets the submission rate. |
It assumes that test_bug_init has been called.
References _Transaction::cl, _Transaction::err, _Transaction::expDsc, _LCB_cl::hdr, invalidate_instruction_cache(), poll(), _BugCtl::ptus, _BugCtl::reg, _LCB_prb::request_queue, _LCB_cl_hdr::result, _LCB_prb::result_queue, _Transaction::rlPci, submit(), and _BugCtl::xcr.
Referenced by test_bug_all().
unsigned int test_bug1 | ( | int | iterations, | |
int | ptus | |||
) |
Test for bridge chip hang. This tests flushes the instruction cache and places 1 NOP between the poke of the PCI result address into the request list and its submission.
iterations | The number of iterations to run | |
ptus | The poll rate in ptus. This effectively sets the submission rate. |
It assumes that test_bug_init has been called.
References _Transaction::cl, _Transaction::err, _Transaction::expDsc, _LCB_cl::hdr, invalidate_instruction_cache(), poll(), _BugCtl::ptus, _BugCtl::reg, _LCB_prb::request_queue, _LCB_cl_hdr::result, _LCB_prb::result_queue, _Transaction::rlPci, submit(), and _BugCtl::xcr.
Referenced by test_bug_all().
unsigned int test_bug4 | ( | int | iterations, | |
int | ptus | |||
) |
Test for bridge chip hang. This tests flushes the instruction cache and places 1 NOP between the poke of the PCI result address into the request list and its submission.
iterations | The number of iterations to run | |
ptus | The poll rate in ptus. This effectively sets the submission rate. |
It assumes that test_bug_init has been called.
References _Transaction::cl, _Transaction::err, _Transaction::expDsc, _LCB_cl::hdr, invalidate_instruction_cache(), poll(), _BugCtl::ptus, _BugCtl::reg, _LCB_prb::request_queue, _LCB_cl_hdr::result, _LCB_prb::result_queue, _Transaction::rlPci, submit(), and _BugCtl::xcr.
Referenced by test_bug_all().
unsigned int test_bug8 | ( | int | iterations, | |
int | ptus | |||
) |
Test for bridge chip hang. This tests flushes the instruction cache and places 1 NOP between the poke of the PCI result address into the request list and its submission.
iterations | The number of iterations to run | |
ptus | The poll rate in ptus. This effectively sets the submission rate. |
It assumes that test_bug_init has been called.
References _Transaction::cl, _Transaction::err, _Transaction::expDsc, _LCB_cl::hdr, invalidate_instruction_cache(), poll(), _BugCtl::ptus, _BugCtl::reg, _LCB_prb::request_queue, _LCB_cl_hdr::result, _LCB_prb::result_queue, _Transaction::rlPci, submit(), and _BugCtl::xcr.
Referenced by test_bug_all().
unsigned int test_bug_all | ( | int | loop, | |
int | iterations, | |||
int | ptus | |||
) |
Runs each test iterations times in a loop for loop times.
loop | The number of major loops (all tests) | |
iterations | The number of iterations for each test | |
ptus | The poll time in PTUs (8000 = 1msec, 800 = .1msec, 100 = 12 usecs) |
References test_baseline(), test_bug0(), test_bug1(), test_bug4(), and test_bug8().
unsigned int test_bug_init | ( | int | stall | ) |
Initializes the test control block by loading the driver and preparing the transaction.
stall | The stall time in LCB clock ticks |
References build_markN(), _BugCtl::dib, _BugCtl::lcb, _BugCtl::lcl2pci, _BugCtl::ptus, _BugCtl::reg, and _BugCtl::xcr.
unsigned int test_erratum15 | ( | int | iterations, | |
int | ncache, | |||
int | which | |||
) |
Tests for reaction of deliberatingly trying to tickle Erratum ` 15.
iterations | The number of iterations to run | |
ncache | The number of cache lines beyond the end cache line to probe. | |
which | Which list, request or result, to probe |
Experimentally it has been seen that this will hang the bridge chip after around 50 iterations. Because of this the watchdog timer is set for about 10 seconds, deemed to be a reasonable time to wait for recovery.
References _Transaction::cl, _Transaction::clSize, _Transaction::err, _Transaction::expDsc, _LCB_cl::hdr, poll_and_tickle(), _BugCtl::reg, _LCB_prb::request_queue, _LCB_cl_hdr::result, _LCB_prb::result_queue, _Transaction::rl, _Transaction::rlPci, _Transaction::rlSize, submit(), and _BugCtl::xcr.
int test_xcr_init | ( | int | stall | ) |
Shell callable routine to builds a transaction containing 3 mark time transactions.
stall | The stall time, in LCBD clock ticks |
References build_markN(), _BugCtl::dib, and _BugCtl::xcr.