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#include <LCB_cr.h>
Public Attributes | |
unsigned int | version: 8 |
unsigned int | user: 7 |
unsigned int | evtPaused: 1 |
unsigned int | reset: 1 |
unsigned int | latp8: 1 |
unsigned int | must_be_1: 1 |
unsigned int | boardID: 5 |
unsigned int | user_1: 1 |
unsigned int | backPressure: 1 |
unsigned int | payloadParity: 1 |
unsigned int | hdrParity: 1 |
unsigned int | oclkTrailing: 1 |
unsigned int | iclkTrailing: 1 |
unsigned int | evtEnable: 1 |
unsigned int | user_0: 1 |
unsigned int _LCB_csr_bf::backPressure |
Assert back pressure (testing)
unsigned int _LCB_csr_bf::boardID |
5 LSB of LATp Node address
Referenced by LCBD_board_id_set().
unsigned int _LCB_csr_bf::evtEnable |
Event enable
Referenced by LCBD_evt_enable().
unsigned int _LCB_csr_bf::evtPaused |
Event transmission paused. Read only.
unsigned int _LCB_csr_bf::hdrParity |
LATp header parity, 0 - odd, 1 - even
unsigned int _LCB_csr_bf::iclkTrailing |
Clock on trailing edge (incoming)
Referenced by LCBD_clk_edge_set().
unsigned int _LCB_csr_bf::latp8 |
1 - byte-wide LATp, 0 - serial LATp. Read/write.
Referenced by LCBD_width_set().
unsigned int _LCB_csr_bf::must_be_1 |
MSB of LATp Node address, always set
unsigned int _LCB_csr_bf::oclkTrailing |
Clock on trailing edge (outgoing)
Referenced by LCBD_clk_edge_set().
unsigned int _LCB_csr_bf::payloadParity |
LATp payload parity, 0 - odd, 1 - even
unsigned int _LCB_csr_bf::reset |
Generate PCI reset. Functional only in cPCI version that is resident in a crate backplane which connects the RAD750 reset signal to the processor
unsigned int _LCB_csr_bf::user |
7-bit user field
unsigned int _LCB_csr_bf::user_0 |
User defined field 0
unsigned int _LCB_csr_bf::user_1 |
User field 1
unsigned int _LCB_csr_bf::version |
FPGA firmware version
Referenced by init_latp_clk_on().