GLAST/LAT > DAQ and FSW > FSW > Doxygen Index > PBC / V4-8-0
Constituent: pbc_bootshell     Tag: rad750
#include "PBC/PBC.h"
#include "vxWorks.h"
#include "asmFns.h"
#include "bootshell.h"
#include "drv/ppci/ppciRegs.h"
#include "rom_defs.h"
#include "pbc_sio.h"
#include "config.h"
Include dependency graph for pbc_sio.c:
Data Structures | |
struct | _pbc_SioChannelDescr |
Boot serial port descriptor struct. More... | |
Defines | |
#define | pbc_SIO_RETRY (10000) |
Define number retries on UART. | |
#define | pbc_SIO_BEGIN_UART_READ pbc_SioBeginUartRead(); |
Setup read access to PPCI UART. | |
#define | pbc_SIO_END_UART_READ pbc_SioEndUartRead(); |
End read access to PPCI UART. | |
Typedefs | |
typedef _pbc_SioChannelDescr | pbc_SioChannelDescr |
Typedef for boot serial port descriptor. | |
Functions | |
void | pbc_SioBeginUartRead (void) |
Setup for PPCI UART Read Access. | |
void | pbc_SioEndUartRead (void) |
Cleanup after PPCI UART read access. | |
void | PBC_SioInitChannel () |
Initalize single NS16550 serial port. | |
Variables | |
pbc_SioChannelDescr | pbc_sioChannel |
Boot serial port descriptor. | |
int | pbc_sioErrStatusMaskReg |
Save error status mask register value. |
CVS $Id: pbc_sio.c,v 1.8 2005/01/10 22:52:40 dmay Exp $
Code in this file provides a simple serial driver for the RAD750 for use by the LAT boot code. Functions are provided to initialize the serial port to a pre-determined configuration (57600 bps, 8 bits, 1 stop bit, no parity).
Functions are provided for simple output to the serial port:
PBC_SioTxChar() Puts a single character to the port.
PBC_SioTxString() Puts a null-terminated string to the port.
PBC_SioTxHex() Puts a hexidecimal number to the port.
Heavily based on evbNs16550Sio.c - NS16550 serial driver for the IBM PPC403GA evaluation board from Wind River and BAE
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Setup read access to PPCI UART. The macro inserts code needed to start a UART read access on the Power PCI ASIC. |
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End read access to PPCI UART. The macro inserts code needed to clean up after UART read access on the Power PCI ASIC. See endUart |
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Define number retries on UART. Define a number of times to retry on the UART when tranmitting characters out of the UART. |
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Setup for PPCI UART Read Access. This function implements a work-around for "Errata #5" in the PPCI Bridge ASIC. This errata is described in the "PPCI Bridge ASIC Master Errata List (BAE Document #255A651)". The workaround suggests that the Machine Check be masked off while reading the UART. This function saves the value of of the PPCI error status mask in pbc_sioErrStatusMaskReg.
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Cleanup after PPCI UART read access. Tail end of workaround described in pbc_SioBeginUartRead(). This function clears the OCB machine check if present then restores the previous value of the PPCI error status register stored in pbc_sioErrStatusMaskReg.
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Initalize single NS16550 serial port. Setup the RAD750 NS16500-compatable serial port for transmission. The serial port is hardcoded to behave in a manner appropriate for the GLAST Primary Boot Code. The serial port will be operated in a single threaded polled manner. Baud rate is hard coded to 57600 bps, 8 bits, 1 stop bit, no parity. The receiver is enabled, but no routines are written to make use of the serial port receiver.
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Boot serial port descriptor. The instantiation of the boot serial port descriptor. This is the only serial port descriptor used, it is a static module global structure. It is initailzed by calls to PBC_SioInitChannel(). |
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Save error status mask register value. This is the saved copy of the PPCI error status mask register used to implement pbc_SioBeginUartRead()/pbc_SioEndUartRead() functions. pbc_SioBeginUartRead() will save the value of the PPCI error status mask register in this variable, and pbc_SioEndUartRead() will restore the error status mask with this value. |