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GLAST/LAT > DAQ and FSW > FSW > Doxygen Index > VXW / V7-1-0

Constituent: vxw_flight_ini     Tag: rad750

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_isrRoutingInfo Struct Reference

#include <isrRouter.h>

Collaboration diagram for _isrRoutingInfo:

[legend]

Data Fields
isrTableEntry_t	isrTable [MAX_INT_LEVELS]
regPtr_t	pStatusReg
regPtr_t	pEnableReg
BOOL	clear
BOOL	one_pass

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Detailed Description

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ISR look-up table structures

The underlying hardware is assumed to have the following proerties:

• Interrupt Status reg - A 32-bit reg where each bit set indicates an active interrupt.
• Interrupt Enable reg - A 32-bit reg where each bit set indicates an enabled interrupt. This reg is also assumed to be 'write to clear,' i.e., any bit can be cleared by writing a 1 to that bit. This only needs to be the case if the 'clear' BOOL is true.
• These regs are ANDed together and then bit by bit ORed to produce a signal which triggers the interrupt router to gain control.
• Both of these regs can be acceessed via direct PIO (pointer reference).
• Both of these regs must be byte-swapped.

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Field Documentation

BOOL _isrRoutingInfo::clear

Should int status be cleared?

isrTableEntry_t _isrRoutingInfo::isrTable[MAX_INT_LEVELS]

ISR look-up table

BOOL _isrRoutingInfo::one_pass

Just read regs once?

regPtr_t _isrRoutingInfo::pEnableReg

Pointer to in enable reg

regPtr_t _isrRoutingInfo::pStatusReg

Pointer to int status reg

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The documentation for this struct was generated from the following file:

• isrRouter.h

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