GLAST/LAT > DAQ and FSW > FSW > Doxygen Index > VXW / V7-1-1
Constituent: vxw_flight     Tag: rad750
#include "vxWorks.h"
Include dependency graph for ppciPid.h:
This graph shows which files directly or indirectly include this file:
Defines | |
#define | DISABLE 0 |
#define | IN 1 |
#define | OUT 2 |
#define | IN_OUT 3 |
#define | IN_LEVEL 0 |
#define | IN_EDGE 1 |
#define | OUT_REG 0 |
#define | OUT_TIMER 1 |
Functions | |
STATUS | pidCnf (int pidNum, int type, int inSen, int outSrc) |
Configure a PID. | |
STATUS | pidSet (int pidNum, int value) |
Set the value of a PID. | |
STATUS | pidGet (int pidNum) |
Get the value of a PID. | |
STATUS | pidIntEnable (int pidNum) |
Enable a PID PPC interrupt. | |
STATUS | pidIntDisable (int pidNum) |
Disable a PID PPC interrupt. | |
STATUS | pidIntConnect (int pidNum, VOIDFUNCPTR isr, int parm) |
Connect to a PID interrupt. | |
STATUS | pidIntEmcEnable (int pidNum) |
Enable a PID EMC interrupt. | |
STATUS | pidIntEmcDisable (int pidNum) |
Disable a PID EMC interrupt. | |
STATUS | pidEdgeClear (int pidNum) |
void | ppciPidInit (void) |
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Description:
Datatypes and function prototypes for PowerPCI ASIC PID routines. See ppciPid.c for detailed descriptions of the functions.
Restrictions:
Change History:
Date Pgm Description -------- --- ------------------------------------------------------ 04/21/00 MJF Initial Release 01/03/01 DS BSP integration. 03/03/03 CH Update to allow pidSet before pidCnf, and to disable a a PID with pidCnf.
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PID configuration: disable PID, no in or out. |
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PID configuration: input PID. |
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PID configuration: input PID as negative edge sensitive. |
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PID configuration: input PID as active low level sensitive. |
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PID configuration: input/output PID. |
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PID configuration: input/output PID. |
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PID configuration: output PID will write to PID output reg. |
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PID configuration: output PID will source TIMER clock. |
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Configure a PID. This routine configures a PID. Input PIDs can be (active low) level sensitive or (negative) edge sensitive. Output PIDs can be sourced from either a timer or the PID output register.
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This routine clears the latched bit in the input register indicating an input edge was detected.
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Get the value of a PID. This routine returns the value (0 or 1) of the specified PID. The PID must be configured as an input.
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Connect to a PID interrupt. This routine connects an interrupt service routine (ISR) to a PowerPCI bridge PID interrupt level. PID interrupts are enabled separate from this routine (by pidIntEnable). The interrupt level being connected should not be enabled when this routine is called. The specified ISR will get control with interrupts disabled.
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Disable a PID PPC interrupt. This routine disables the specified PID as an interrupt (to the processor). The PID must be configured as an input.
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Disable a PID EMC interrupt. This routine disables the specified PID as an interrupt to the EMC. The PID must be configured as an input.
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Enable a PID EMC interrupt. This routine enables the specified PID as an interrupt to the EMC. The PID must be configured as an input.
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Enable a PID PPC interrupt. This routine enables the specified PID as an interrupt (to the processor). The PID must be configured as an input.
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Set the value of a PID. This routine sets a PID to a specified value. The PID does not have to be configured as an output.
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This init routine is called by ppciInit (from sysHwInit) during system boot. Interrupt routing resources are initialized. |