GLAST / LAT > DAQ and FSW > FSW > Doxygen Index> VXW / V7-2-0 > vxw_flight / rad750
#include "vxWorks.h"
#include "drv/ppci/ppciRegs.h"
Typedefs | |
typedef enum pwrMgtMode | pwrMgtMode_t |
Enumerations | |
enum | pwrMgtMode { SLEEP_MODE = 0, NAP_MODE = 1, DOZE_MODE = 2, FULL_POWER = 3, DONT_CHANGE = 4 } |
Functions | |
int | getCpuClkDiv (void) |
Get CPU Clock Divide. | |
ppciPllMult_t | getCpuClkMult (void) |
Get CPU Clock Multiplier. | |
STATUS | setCpuClk (int divisor, ppciPllMult_t multiplier) |
int | getRtcClkDiv (void) |
Get RTC Clock Divide. | |
STATUS | setRtcClkDiv (int value, BOOL recalibrate) |
Set RTC Clock Divide. | |
int | getPciClkDiv (void) |
Get PCI Clock Divide. | |
STATUS | setPciClkDiv (int value) |
Set PCI Clock Divide. | |
STATUS | setPowerMgtMode (pwrMgtMode_t cpuMode, pwrMgtMode_t bridgeMode) |
Set Power Management Mode. | |
int | getOscRate (void) |
Return the CPU card oscillator rate. | |
void | ppciClkCtrlInit (int rtcClkDiv, int osc, int minClk, int maxClk, int sigNum) |
Init routine for Clock Control function. |
-----------------------------------------------------------------------------
Description:
Clock control routines datatypes and function prototypes. See ppciClkCtrl.c for detailed descriptions of the functions.
Restrictions:
Change History:
Date Pgm Description -------- --- ------------------------------------------------------- 12/04/00 DS Created.
-----------------------------------------------------------------------------
The typedef for pwrMgtMode.
enum pwrMgtMode |
The PPC power management mode settings. Used for function setPowerMgtMode().
int getCpuClkDiv | ( | void | ) |
Get CPU Clock Divide.
Get CPU Clock Divide
This routine returns the divide value being used to derive the CPU clock.
ppciPllMult_t getCpuClkMult | ( | void | ) |
Get CPU Clock Multiplier.
Get CPU Clock Multiplier
This routine returns the encoded multiplier value used by the PLL logic to generate the CPU clock. Note that the value in HID1[0..3] is bit-reversed compare to this value.
int getOscRate | ( | void | ) |
Return the CPU card oscillator rate.
Return the CPU card oscillator rate (defined in config.h).
int getPciClkDiv | ( | void | ) |
Get PCI Clock Divide.
Get PCI Clock Divide
This routine returns the value being used to derive the PCI clock (by dividing the oscillator input): 1, 2, 4 or 8.
int getRtcClkDiv | ( | void | ) |
Get RTC Clock Divide.
Get RTC Clock Divide
This routine returns the value being used to derive the RTC (by dividing the oscillator input): 4, 8, 16 or 32.
void ppciClkCtrlInit | ( | int | rtcClkDiv, | |
int | osc, | |||
int | minClk, | |||
int | maxClk, | |||
int | sigNum | |||
) |
Init routine for Clock Control function.
Init routine for Clock Control function
This init routine is called by ppciInit (from sysHwInit) during system boot. Run-time constants and the RTC clock divide are set.
Restrictions:
Mutliprocessor signal support must be init before this call.
rtcClkDiv | - RTC clock divide (4, 8, 16 or 32). | |
osc | - Oscillator rate (nominally 33 MHz). | |
minClk | - Minimum allowable CPU clock input for PLL to lock. | |
maxClk | - Maximum rate at which CPU can be clocked (including PLL mult). | |
sigNum | - Mlitprocessing signal used by EMC to wake up CPU. |
STATUS setCpuClk | ( | int | divisor, | |
ppciPllMult_t | multiplier | |||
) |
Set CPU Clock.
Set CPU Clock
This routine sets the divisor and multiplier values used to derive the CPU clock from the oscillator. The divisor is used in deriving the CPU clock from the oscillator input. The multiplier is used by the CPU's PLL.
divisor | - The cpu clock divisor: 1, 2, 4 or 8 | |
multiplier | - 4-bit encoded PLL input |
STATUS setPciClkDiv | ( | int | value | ) |
Set PCI Clock Divide.
Set PCI Clock Divide
This routine sets the value to used to derive the PCI clock (by dividing the oscillator input).
value | CPU clock divisor- 1, 2, 4 or 8 |
STATUS setPowerMgtMode | ( | pwrMgtMode_t | cpuMode, | |
pwrMgtMode_t | bridgeMode | |||
) |
Set Power Management Mode.
Set Power Management Mode
This routine sets the power management mode of the CPU and the Power PCI bridge. Only the doze and full power modes are supported.
cpuMode | - CPU power management mode. | |
bridgeMode | - Power PCI power management mode. |
STATUS setRtcClkDiv | ( | int | value, | |
BOOL | recalibrate | |||
) |
Set RTC Clock Divide.
Set RTC Clock Divide
This routine sets the value to used to derive the RTC (by dividing the oscillator input). Changing this value affects the UART clock. If the recalibrate flag is set, SIO_BAUD_SET ioctl() is called keep the clock at its current rate.
Note: it is possible to wire a board such that the RTC does not feed the UART clock. This configuration seems unlikely, but if it is, set recalibrate to FALSE.
value | Clock divisor value - 4, 8, 16 or 32 | |
recalibrate | - TRUE to recalibrate the UART |