2. Assumptions

This section covers working assumptions upon which this document depends.

2.1. Hardware Assumptions

For the purposes of this document the hardware consists of one or more cPCI crates, each crate containing one and only one LCB desscribed in [2], one to three PowerPC SBCs described in [7] running VxWorks and optionally a SIB described in [1]. All communication between these PCI modules is performed via a 33 MHz PCI bus.

2.1.1. cPCI Backplane Assumptions

It is assumed that the PCI backplane is constructed is such a way that a SBC will be able to determine which physical slot it resides in. Most importantly it is assumed that a SBC will be able to determine whether or not it occupies the cPCI system slot.

2.1.2. SBC Assumptions

Much of how a SBC configures its memory spaces depends on the particulars of the board and the BSP. As the flight board is currently undetermined this chapter assumes a suitable board and BSP exists and that the VxWorks API for PCI communications is available.

The SBCs in the entire LAT are assumed to be homogeneous in both hardware and software. The only difference between the SBCs is in which cPCI slot a SBC resides. The Director SBC (or master) is defined as that SBC which resides in the cPCI system slot, while all other SBCs are defined as Actor SBCs (or slaves).

Homegeneity in hardware and software implies numerous properties of the system:

  • All SBCs will map the same local memory ranges to PCI address ranges.

  • The PCI-host bridge for each SBC will have the same PCI DeviceId and VendorId.

A simple diagram of this setup is shown below.

Figure 1. Layout of the PCI bus in a single cPCI crate.