LAT System Initialization: A Beginning
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Chapter 1. cPCI Crate Initialization

Table of Contents

1.1. Configuring the Director SBC

1.2. Configuring the PCI Bus

1.2.1. Base Address Registers (BAR)
1.2.2. Interrupt Pin
1.2.3. Command and Status Registers in PCI Configuration Space

1.3. Configuring and enabling the SIB

1.4. Configuring the Actor SBCs

1.5. Configuring the LCB

1.5.1. Configuring the Event Circular Buffers
1.5.2. Enabling the LCB

1.6. Memory Maps

1.6.1. SIB Memory Maps

1.6.2. LCB and SBC Memory Maps

1.6.2.1. LCB Exposed Memory
1.6.2.2. SBC Exposed Memory
1.6.2.3. Putting It All Together

1.7. LSI Timing Diagram

1.7.1. PCI Crate Initialization Timing Diagram
1.7.2. Single Actor SBC Reboot Timing Diagram

This section summarizes the startup initialization of the LAT hardware for a single cPCI crate.

LAT System Initialization consists of the following activities, some of which ocurr simultaneously.

Initializing the Director SBC.
Configuring the PCI bus.
Configuring and enabling the SIB if present.
SBC Self-Configuration.
Configuring and enabling the LCB.

The bulk of the initialization consists of configuring various memory spaces for use with the PCI bus. For a good description of PCI memory spaces and the PCI architecture see [6].

The greatest challenge is communication and syncronization between the SBCs and the other cPCI modules before the system is completely configured – a classic boot strapping problem. Several recurring issues are:

How do the Actor SBCs know that the Director SBC has successfully completed configuring the PCI bus ?
How does the Director SBC know that the Actor SBCs have prepared themselves for event taking before enabling the LCB?
[ PLACEHOLDER – SIB issues here ]

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Assumptions		Configuring the Director `SBC`