1.5. Configuring the LCB

The LCB exposes three different memory spaces to the PCI bus: Configuration space, I/O space and Memory space.

Only the Director SBC requires write access to the Configuration space of the LCB in order to set up the PCI memory space. On the other hand, all SBCs require read/write access to the I/O and Memory spaces of the LCB.

The tricky part is that the Actor SBCs cannot access the I/O and Memory spaces of the LCB until after the Director SBC configures the LCB.

1.5.1. Configuring the Event Circular Buffers

For event data the LCB maintains 3 circular buffers, one for each of the potential SBCs. See [2] for more details.

Since the SBCs are uniformly configured the Director SBC can program the base addresses of these circular buffers in the LCB's EVENTS_BASEn registers on behalf of the Actor SBCs. The Actor SBCs need not do this.

Once the circular buffers are confiugred the LCB is ready to be enabled.

1.5.2. Enabling the LCB

The Director SBC enables the LCB for business by setting two different bits in two different registers. First the PCI Memory space of the LCB is enabled by setting the Memory Access Enable bit of the PCI Configuration space Command register.

Next the Director SBC sets the Enable Event bit in the Control and Status register of the LCB. Setting this bit causes the LCB to place a special LCB Start marker word into the result FIFO of each SBC followed by an interrupt. This marker and interrupt is the signal that the LCB is now open for business.

An Actor SBC can syncronize itself with the enabling of the LCB as follows.

  1. Check the Memory Access Enable bit of the PCI Configuration space Command register. If set then the LCB is configured and ready to go.

  2. Otherwise the LCB is not yet configured so wait for the interrupt that is generated when the Enable Event bit in the Control and Status register of the LCB is set.

This scheme allows the Director SBC and the Actor SBCs syncronize in the case when the PCI crate first boots – all the SBCs are rebooted. The Actor SBCs would pend on the interrupt for syncronization in this case. See Figure 1-7 for a timing diagram describing this sequence.

This scheme also works in the case when a Actor SBC reboots in the middle of the day. In this case after booting the Actor SBC would look at the Memory Access Enable bit of the PCI Configuration space Command register, see it was set and assume the LCB is properly configured. See Figure 1-8 for a timing diagram describing this sequence.